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Searched refs:MPLL_CONTROL__DQ_0_1_BG_PWRON_MASK (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_sh_mask.h11330 #define MPLL_CONTROL__DQ_0_1_BG_PWRON_MASK 0x00100000L macro
Dgmc_7_1_sh_mask.h9569 #define MPLL_CONTROL__DQ_0_1_BG_PWRON_MASK 0x100000 macro
Dgmc_8_1_sh_mask.h10483 #define MPLL_CONTROL__DQ_0_1_BG_PWRON_MASK 0x100000 macro