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Searched refs:MPLL_CONTROL__DQ_0_0_PLL_RESET__SHIFT (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_sh_mask.h11329 #define MPLL_CONTROL__DQ_0_0_PLL_RESET__SHIFT 0x00000012 macro
Dgmc_7_1_sh_mask.h9566 #define MPLL_CONTROL__DQ_0_0_PLL_RESET__SHIFT 0x12 macro
Dgmc_8_1_sh_mask.h10480 #define MPLL_CONTROL__DQ_0_0_PLL_RESET__SHIFT 0x12 macro