Searched refs:MMHUB_HWIP (Results 1 – 16 of 16) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | mmhub_v2_0.c | 156 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v2_0_print_l2_protection_fault_status()
573 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v2_0_update_medium_grain_clock_gating()
607 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v2_0_update_medium_grain_clock_gating()
633 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v2_0_update_medium_grain_light_sleep()
650 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v2_0_update_medium_grain_light_sleep()
669 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v2_0_set_clockgating()
694 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v2_0_get_clockgating()
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| D | dimgrey_cavefish_reg_init.c | 37 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
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| D | aldebaran_reg_init.c | 36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in aldebaran_reg_base_init()
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| D | arct_reg_init.c | 36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in arct_reg_base_init()
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| D | vega10_reg_init.c | 36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in vega10_reg_base_init()
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| D | vega20_reg_init.c | 36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in vega20_reg_base_init()
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| D | amdgpu_discovery.c | 179 [MMHUB_HWIP] = MMHUB_HWID,
1947 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
1969 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
1993 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2009 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2030 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2054 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2082 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
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| D | gmc_v9_0.c | 623 switch (adev->ip_versions[MMHUB_HWIP][0]) { in gmc_v9_0_process_interrupt()
1255 switch (adev->ip_versions[MMHUB_HWIP][0]) { in gmc_v9_0_set_mmhub_funcs()
1270 switch (adev->ip_versions[MMHUB_HWIP][0]) { in gmc_v9_0_set_mmhub_ras_funcs()
1734 switch (adev->ip_versions[MMHUB_HWIP][0]) { in gmc_v9_0_init_golden_registers()
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| D | gmc_v10_0.c | 238 GC_HWIP : MMHUB_HWIP; in gmc_v10_0_flush_vm_hub()
703 switch (adev->ip_versions[MMHUB_HWIP][0]) { in gmc_v10_0_set_mmhub_funcs()
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| D | mmhub_v2_3.c | 93 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v2_3_print_l2_protection_fault_status()
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| D | mmhub_v3_0.c | 110 switch (adev->ip_versions[MMHUB_HWIP][0]) { in mmhub_v3_0_print_l2_protection_fault_status()
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| D | gmc_v11_0.c | 550 switch (adev->ip_versions[MMHUB_HWIP][0]) { in gmc_v11_0_set_mmhub_funcs()
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| D | amdgpu_virt.c | 856 case MMHUB_HWIP: in amdgpu_virt_get_rlcg_reg_access_flag()
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| D | mes_v10_1.c | 307 adev->reg_offset[MMHUB_HWIP][0][i]; in mes_v10_1_set_hw_resources()
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| D | mes_v11_0.c | 307 adev->reg_offset[MMHUB_HWIP][0][i]; in mes_v11_0_set_hw_resources()
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| D | amdgpu.h | 648 MMHUB_HWIP, enumerator
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