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Searched refs:MLXSW_REG (Results 1 – 25 of 37) sorted by relevance

12

/linux-5.19.10/drivers/net/ethernet/mellanox/mlxsw/
Dreg.h28 #define MLXSW_REG(type) (&mlxsw_reg_##type) macro
29 #define MLXSW_REG_LEN(type) MLXSW_REG(type)->len
30 #define MLXSW_REG_ZERO(type, payload) memset(payload, 0, MLXSW_REG(type)->len)
12991 MLXSW_REG(sgcr),
12992 MLXSW_REG(spad),
12993 MLXSW_REG(sspr),
12994 MLXSW_REG(sfdat),
12995 MLXSW_REG(sfd),
12996 MLXSW_REG(sfn),
12997 MLXSW_REG(spms),
[all …]
Dspectrum_nve_vxlan.c208 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_set()
217 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_clear()
227 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp1_nve_vxlan_rtdp_set()
318 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnpc), tnpc_pl); in mlxsw_sp2_nve_vxlan_learning_set()
330 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl); in mlxsw_sp2_nve_decap_ethertype_set()
355 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_set()
361 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl); in mlxsw_sp2_nve_vxlan_config_set()
374 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl); in mlxsw_sp2_nve_vxlan_config_set()
377 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_set()
392 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl); in mlxsw_sp2_nve_vxlan_config_clear()
[all …]
Dcore_hwmon.c81 err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_hwmon_temp_show()
106 err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_hwmon_temp_max_show()
139 err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_hwmon_temp_rst_store()
144 err = mlxsw_reg_write(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_hwmon_temp_rst_store()
164 err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mfsm), mfsm_pl); in mlxsw_hwmon_fan_rpm_show()
184 err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(fore), fore_pl); in mlxsw_hwmon_fan_fault_show()
206 err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mfsc), mfsc_pl); in mlxsw_hwmon_pwm_show()
234 err = mlxsw_reg_write(mlxsw_hwmon->core, MLXSW_REG(mfsc), mfsc_pl); in mlxsw_hwmon_pwm_store()
258 err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_hwmon_module_temp_get()
297 err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtbr), mtbr_pl); in mlxsw_hwmon_module_temp_fault_show()
[all …]
Dspectrum_acl_ctcam.c23 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_ctcam_region_resize()
36 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(prcr), prcr_pl); in mlxsw_sp_acl_ctcam_region_move()
75 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_insert()
96 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_remove()
117 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_action_replace()
Dspectrum1_mr_tcam.c57 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_replace()
79 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_remove()
184 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_alloc()
195 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_free()
211 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_parman_resize()
226 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rrcr), rrcr_pl); in mlxsw_sp1_mr_tcam_region_parman_move()
Dspectrum_router_xm.c87 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rxlte), rxlte_pl); in mlxsw_sp_router_ll_xm_init()
92 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(xralta), xralta_pl); in mlxsw_sp_router_ll_xm_ralta_write()
97 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(xralst), xralst_pl); in mlxsw_sp_router_ll_xm_ralst_write()
102 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(xraltb), xraltb_pl); in mlxsw_sp_router_ll_xm_raltb_write()
284 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(xrmt), xrmt_pl); in mlxsw_sp_router_xm_ltable_lvalue_set()
398 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rlpmce), in mlxsw_sp_router_xm_cache_flush_work()
437 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rlcmld), rlcmld_pl); in mlxsw_sp_router_xm_cache_flush_work()
670 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(xmdr), op_ctx_xm->xmdr_pl); in mlxsw_sp_router_ll_xm_fib_entry_commit()
749 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(xltq), xltq_pl); in mlxsw_sp_router_xm_init()
769 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rxltm), rxltm_pl); in mlxsw_sp_router_xm_init()
Dcore_env.c117 err = mlxsw_reg_query(core, MLXSW_REG(mcia), mcia_pl); in mlxsw_env_validate_cable_ident()
194 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcia), mcia_pl); in mlxsw_env_query_module_eeprom()
228 err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_env_module_temp_thresholds_get()
280 err = mlxsw_reg_query(core, MLXSW_REG(mcia), mcia_pl); in mlxsw_env_module_temp_thresholds_get()
499 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcia), mcia_pl); in mlxsw_env_get_module_eeprom_by_page()
526 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); in mlxsw_env_module_reset()
611 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcion), mcion_pl); in mlxsw_env_get_module_power_mode()
644 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); in mlxsw_env_module_enable_set()
663 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmmp), pmmp_pl); in mlxsw_env_module_low_power_set()
781 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mtbr), mtbr_pl); in mlxsw_env_module_has_temp_sensor()
[all …]
Dspectrum.c186 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl); in mlxsw_sp_flow_counter_get()
203 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl); in mlxsw_sp_flow_counter_clear()
279 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); in mlxsw_sp_port_vid_stp_set()
289 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl); in mlxsw_sp_base_mac_get()
305 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); in mlxsw_sp_port_admin_status_set()
316 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); in mlxsw_sp_port_dev_addr_set()
336 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sp_port_max_mtu_get()
354 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sp_port_mtu_set()
363 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sp_port_swid_set()
372 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl); in mlxsw_sp_port_vp_mode_set()
[all …]
Dcore_thermal.c283 err = mlxsw_reg_query(thermal->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_thermal_get_temp()
443 err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_thermal_module_temp_and_thresholds_get()
590 err = mlxsw_reg_query(thermal->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_thermal_gearbox_temp_get()
636 err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfsc), mfsc_pl); in mlxsw_thermal_get_cur_state()
667 err = mlxsw_reg_write(thermal->core, MLXSW_REG(mfsc), mfsc_pl); in mlxsw_thermal_set_cur_state()
767 err = mlxsw_reg_query(core, MLXSW_REG(mgpir), mgpir_pl); in mlxsw_thermal_modules_init()
868 err = mlxsw_reg_query(core, MLXSW_REG(mgpir), mgpir_pl); in mlxsw_thermal_gearboxes_init()
989 err = mlxsw_reg_query(core, MLXSW_REG(mgpir), mgpir_pl); in mlxsw_thermal_init()
1006 err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfcr), mfcr_pl); in mlxsw_thermal_init()
1020 err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfsl), in mlxsw_thermal_init()
[all …]
Dcore_linecards.c83 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mddq), mddq_pl); in mlxsw_linecard_type_name()
274 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddc), mddc_pl); in mlxsw_linecard_ready_set()
288 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddc), mddc_pl); in mlxsw_linecard_ready_clear()
377 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mddq), mddq_pl); in mlxsw_linecard_status_get_and_process()
410 MLXSW_REG(mbct), linecard->mbct_pl); in __mlxsw_linecard_fix_fsm_state()
431 err = mlxsw_reg_query(linecard->linecards->mlxsw_core, MLXSW_REG(mbct), in mlxsw_linecard_query_ini_status()
468 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mbct), in mlxsw_linecard_ini_transfer()
500 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mbct), in mlxsw_linecard_ini_erase()
566 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mbct), linecard->mbct_pl); in mlxsw_linecard_ini_activate()
828 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddq), mddq_pl); in mlxsw_linecard_event_delivery_set()
[all …]
Dspectrum_dcb.c257 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpts), qpts_pl); in mlxsw_sp_port_dcb_app_update_qpts()
269 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qrwe), qrwe_pl); in mlxsw_sp_port_dcb_app_update_qrwe()
307 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdp), qpdp_pl); in mlxsw_sp_port_dcb_app_update_qpdp()
321 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdpm), qpdpm_pl); in mlxsw_sp_port_dcb_app_update_qpdpm()
335 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdsm), qpdsm_pl); in mlxsw_sp_port_dcb_app_update_qpdsm()
487 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl); in mlxsw_sp_port_pfc_cnt_get()
527 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), in mlxsw_sp_port_pfc_set()
Dspectrum_ipip.c180 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp_ipip_nexthop_update_gre4()
219 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp_ipip_decap_config_gre4()
481 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp2_ipip_nexthop_update_gre6()
519 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp2_ipip_decap_config_gre6()
608 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tieem), tieem_pl); in mlxsw_sp_ipip_ecn_encap_init_one()
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tidem), tidem_pl); in mlxsw_sp_ipip_ecn_decap_init_one()
Dspectrum_ptp.c111 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp1_ptp_phc_adjfreq()
141 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtpps), mtpps_pl); in mlxsw_sp1_ptp_phc_settime()
148 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp1_ptp_phc_settime()
698 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtptpt), mtptpt_pl); in mlxsw_sp_ptp_mtptpt_set()
707 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp1_ptp_set_fifo_clr_on_trap()
713 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp1_ptp_set_fifo_clr_on_trap()
722 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtpppc), mtpppc_pl); in mlxsw_sp1_ptp_mtpppc_set()
802 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpsc), qpsc_pl); in mlxsw_sp1_ptp_shaper_params_set()
1002 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); in mlxsw_sp1_ptp_port_shaper_set()
Dspectrum_acl_flex_actions.c27 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp_act_kvdl_set_add()
78 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp2_act_kvdl_set_activity_get()
98 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbs), ppbs_pl); in mlxsw_sp_act_kvdl_fwd_entry_add()
Dspectrum_span.c193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_phys_configure()
208 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_deconfigure_common()
501 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_gretap4_configure()
604 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_gretap6_configure()
663 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_vlan_configure()
1240 return mlxsw_reg_write(span->mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); in __mlxsw_sp_span_trigger_port_bind()
1378 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpagr), mpagr_pl); in mlxsw_sp2_span_trigger_global_bind()
1429 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(momte), momte_pl); in __mlxsw_sp2_span_trigger_global_enable()
1434 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(momte), momte_pl); in __mlxsw_sp2_span_trigger_global_enable()
1725 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp2_span_policer_id_base_set()
[all …]
Dspectrum_buffers.c193 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl); in mlxsw_sp_sb_pr_write()
217 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl); in mlxsw_sp_sb_pr_desc_write()
232 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbcm), sbcm_pl); in mlxsw_sp_sb_cm_write()
261 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl); in mlxsw_sp_sb_pm_write()
284 return mlxsw_reg_trans_query(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl, in mlxsw_sp_sb_pm_occ_clear()
312 return mlxsw_reg_trans_query(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl, in mlxsw_sp_sb_pm_occ_query()
474 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); in mlxsw_sp_hdroom_configure_buffers()
498 err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb), pptb_pl); in mlxsw_sp_hdroom_configure_priomap()
518 err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); in mlxsw_sp_hdroom_configure_int_buf()
1152 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbmm), sbmm_pl); in mlxsw_sp_sb_mms_init()
[all …]
Dcore.c236 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); in mlxsw_core_trap_groups_set()
970 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcqi), mcqi_pl); in mlxsw_core_fw_component_query()
990 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_lock()
999 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_lock()
1012 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_component_update()
1024 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl); in mlxsw_core_fw_fsm_block_download()
1037 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_component_verify()
1048 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_activate()
1064 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_query_state()
1082 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_cancel()
[all …]
Dspectrum_acl_erp.c193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_update()
399 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_add()
418 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_del()
434 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_enable()
452 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_disable()
658 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_add()
675 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_del()
1363 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_init()
1374 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_param_init()
Dspectrum2_acl_tcam.c113 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp2_acl_tcam_init()
118 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pgcr), pgcr_pl); in mlxsw_sp2_acl_tcam_init()
Dspectrum_acl_atcam.c287 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perar), perar_pl); in mlxsw_sp_acl_atcam_region_associate()
408 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_insert()
437 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_remove()
466 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_action_replace()
Dspectrum_nve.c398 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnumt), tnumt_pl); in mlxsw_sp_nve_mc_record_refresh()
782 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); in mlxsw_sp_nve_fdb_flush_by_fid()
1020 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqdr), tnqdr_pl); in mlxsw_sp_port_nve_init()
1032 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqcr), tnqcr_pl); in mlxsw_sp_nve_qos_init()
1046 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tneem), in mlxsw_sp_nve_ecn_encap_init()
1066 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tndem), tndem_pl); in __mlxsw_sp_nve_ecn_decap_init()
Dminimal.c50 err = mlxsw_reg_query(mlxsw_m->core, MLXSW_REG(spad), spad_pl); in mlxsw_m_base_mac_get()
193 err = mlxsw_reg_query(mlxsw_m->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_m_port_module_info_get()
211 err = mlxsw_reg_query(mlxsw_m->core, MLXSW_REG(ppad), ppad_pl); in mlxsw_m_port_dev_addr_get()
Dspectrum_acl_bloom_filter.c441 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(peabfe), peabfe_pl); in mlxsw_sp_acl_bf_entry_add()
478 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(peabfe), peabfe_pl); in mlxsw_sp_acl_bf_entry_del()
Dspectrum_acl_tcam.c282 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pagt), pagt_pl); in mlxsw_sp_acl_tcam_group_update()
374 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbt), ppbt_pl); in mlxsw_sp_acl_tcam_group_bind()
389 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbt), ppbt_pl); in mlxsw_sp_acl_tcam_group_unbind()
646 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_tcam_region_alloc()
662 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_tcam_region_free()
673 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pacl), pacl_pl); in mlxsw_sp_acl_tcam_region_enable()
684 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pacl), pacl_pl); in mlxsw_sp_acl_tcam_region_disable()
Dspectrum_fid.c343 err = mlxsw_reg_write(fid_family->mlxsw_sp->core, MLXSW_REG(sftr2), in mlxsw_sp_fid_flood_set()
423 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); in mlxsw_sp_fid_op()
438 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); in mlxsw_sp_fid_vni_op()
448 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl); in __mlxsw_sp_fid_port_vid_map()
1027 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfgc), sfgc_pl); in mlxsw_sp_fid_flood_table_init()

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