Searched refs:MISC_REG_CPMU_LP_MASK_ENT_P0 (Results 1 – 2 of 2) sorted by relevance
1567 #define MISC_REG_CPMU_LP_MASK_ENT_P0 0xa880 macro
6667 REG_WR(bp, MISC_REG_CPMU_LP_MASK_ENT_P0 + (params->port << 2), in bnx2x_update_link_down()6719 REG_WR(bp, MISC_REG_CPMU_LP_MASK_ENT_P0 + in bnx2x_update_link_up()