Searched refs:MISC_CLK_CTRL__ZCLK_SEL__SHIFT (Results 1 – 12 of 12) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | fiji_baco.c | 99 …DIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__ZCLK_SEL_MASK, MISC_CLK_CTRL__ZCLK_SEL__SHIFT, 0, 0x…
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| D | ci_baco.c | 116 …DIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__ZCLK_SEL_MASK, MISC_CLK_CTRL__ZCLK_SEL__SHIFT, 0, 0x…
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| D | polaris_baco.c | 102 …DIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__ZCLK_SEL_MASK, MISC_CLK_CTRL__ZCLK_SEL__SHIFT, 0, 0x…
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| D | tonga_baco.c | 107 …DIFYWRITE, mmGCK_SMC_IND_DATA, MISC_CLK_CTRL__ZCLK_SEL_MASK, MISC_CLK_CTRL__ZCLK_SEL__SHIFT, 0, 0x…
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| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | cik.c | 1834 (1 << MISC_CLK_CTRL__ZCLK_SEL__SHIFT); in cik_program_aspm()
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| D | vi.c | 1230 (1 << MISC_CLK_CTRL__ZCLK_SEL__SHIFT); in vi_program_aspm()
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/smu/ |
| D | smu_7_0_0_sh_mask.h | 272 #define MISC_CLK_CTRL__ZCLK_SEL__SHIFT 0x8 macro
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| D | smu_7_1_1_sh_mask.h | 270 #define MISC_CLK_CTRL__ZCLK_SEL__SHIFT 0x8 macro
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| D | smu_7_0_1_sh_mask.h | 270 #define MISC_CLK_CTRL__ZCLK_SEL__SHIFT 0x8 macro
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| D | smu_7_1_0_sh_mask.h | 268 #define MISC_CLK_CTRL__ZCLK_SEL__SHIFT 0x8 macro
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| D | smu_7_1_2_sh_mask.h | 270 #define MISC_CLK_CTRL__ZCLK_SEL__SHIFT 0x8 macro
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| D | smu_7_1_3_sh_mask.h | 298 #define MISC_CLK_CTRL__ZCLK_SEL__SHIFT 0x8 macro
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