Searched refs:MDIO_WC_REG_PMD_KR_CONTROL (Results 1 – 2 of 2) sorted by relevance
7365 #define MDIO_WC_REG_PMD_KR_CONTROL 0x0096 macro
3742 {MDIO_PMA_DEVAD, MDIO_WC_REG_PMD_KR_CONTROL, 0x2}, in bnx2x_warpcore_enable_AN_KR()3897 {MDIO_PMA_DEVAD, MDIO_WC_REG_PMD_KR_CONTROL, 0x2} in bnx2x_warpcore_set_10G_KR()4101 MDIO_WC_REG_PMD_KR_CONTROL, ~(1<<1)); in bnx2x_warpcore_set_20G_force_KR2()