Searched refs:MDIO_WC_REG_CL72_USERB0_CL72_2P5_DEF_CTRL (Results 1 – 2 of 2) sorted by relevance
7439 #define MDIO_WC_REG_CL72_USERB0_CL72_2P5_DEF_CTRL 0x82e8 macro
3798 MDIO_WC_REG_CL72_USERB0_CL72_2P5_DEF_CTRL, in bnx2x_warpcore_enable_AN_KR()