Searched refs:MDIO_REG_BANK_CL73_IEEEB1 (Results 1 – 2 of 2) sorted by relevance
5108 MDIO_REG_BANK_CL73_IEEEB1, in bnx2x_set_autoneg()5119 MDIO_REG_BANK_CL73_IEEEB1, in bnx2x_set_autoneg()5216 MDIO_REG_BANK_CL73_IEEEB1, in bnx2x_set_ieee_aneg_advertisement()5221 MDIO_REG_BANK_CL73_IEEEB1, in bnx2x_set_ieee_aneg_advertisement()5387 MDIO_REG_BANK_CL73_IEEEB1, in bnx2x_update_adv_fc()5391 MDIO_REG_BANK_CL73_IEEEB1, in bnx2x_update_adv_fc()5665 CL22_RD_OVER_CL45(bp, phy, MDIO_REG_BANK_CL73_IEEEB1, in bnx2x_link_settings_status()
6829 #define MDIO_REG_BANK_CL73_IEEEB1 0x10 macro