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Searched refs:MC_WR_TC1__ENABLE_MASK (Results 1 – 5 of 5) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_sh_mask.h1157 #define MC_WR_TC1__ENABLE_MASK 0x1 macro
Dgmc_8_2_sh_mask.h1403 #define MC_WR_TC1__ENABLE_MASK 0x1 macro
Dgmc_6_0_sh_mask.h10092 #define MC_WR_TC1__ENABLE_MASK 0x00000001L macro
Dgmc_7_1_sh_mask.h1225 #define MC_WR_TC1__ENABLE_MASK 0x1 macro
Dgmc_8_1_sh_mask.h1409 #define MC_WR_TC1__ENABLE_MASK 0x1 macro