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Searched refs:MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_sh_mask.h3018 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT 0x7 macro
Dgmc_8_2_sh_mask.h3866 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT 0x7 macro
Dgmc_6_0_sh_mask.h9959 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT 0x00000007 macro
Dgmc_7_1_sh_mask.h3622 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT 0x7 macro
Dgmc_8_1_sh_mask.h4024 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT 0x7 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_1_0_sh_mask.h10067 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT macro
Dmmhub_9_1_sh_mask.h9730 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT macro
Dmmhub_9_3_0_sh_mask.h10205 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT macro
Dmmhub_1_7_sh_mask.h32167 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h8649 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT macro
Dgc_9_1_sh_mask.h8448 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT macro
Dgc_9_2_1_sh_mask.h8279 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT macro
Dgc_9_4_2_sh_mask.h31685 #define MC_VM_MX_L1_TLB_CNTL__ECO_BITS__SHIFT macro