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/linux-5.19.10/Documentation/translations/zh_CN/loongarch/
Dirq-chip-model.rst12 目前,基于LoongArch的处理器(如龙芯3A5000)只能与LS7A芯片组配合工作。LoongArch计算机
15 HTVECINTC(Hyper-Transport Vector Interrupt Controller)、PCH-PIC(LS7A芯片组的主中
16 断控制器)、PCH-LPC(LS7A芯片组的LPC中断控制器)和PCH-MSI(MSI中断控制器)。
144 龙芯LS7A芯片组的文档:
/linux-5.19.10/Documentation/devicetree/bindings/mips/loongson/
Ddevices.yaml20 - description: Classic Loongson64 Quad Core + LS7A
32 - description: Generic Loongson64 Quad Core + LS7A
/linux-5.19.10/arch/mips/loongson64/
Denv.c173 loongson_sysconf.bridgetype = LS7A; in prom_lefi_init_env()
198 case LS7A: in prom_lefi_init_env()
217 if (loongson_sysconf.bridgetype == LS7A) in prom_lefi_init_env()
/linux-5.19.10/Documentation/loongarch/
Dirq-chip-model.rst8 with LS7A chipsets. The irq chips in LoongArch computers include CPUINTC (CPU Core
11 PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller
12 in LS7A chipset) and PCH-MSI (MSI Interrupt Controller).
142 Documentation of Loongson's LS7A chipset:
/linux-5.19.10/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,pch-pic.yaml13 This interrupt controller is found in the Loongson LS7A family of PCH for
Dloongson,pch-msi.yaml13 This interrupt controller is found in the Loongson LS7A family of PCH for
/linux-5.19.10/arch/mips/include/asm/mach-loongson64/
Dboot_param.h196 LS7A = 1, enumerator