Searched refs:L1I (Results 1 – 25 of 31) sorted by relevance
12
| /linux-5.19.10/arch/alpha/kernel/ |
| D | setup.c | 1280 int L1I, L1D, L2, L3; in determine_cpu_caches() local
1287 L1I = CSHAPE(8*1024, 5, 1); in determine_cpu_caches()
1289 L1I = CSHAPE(16*1024, 5, 1); in determine_cpu_caches()
1290 L1D = L1I; in determine_cpu_caches()
1311 L1I = L1D = CSHAPE(8*1024, 5, 1); in determine_cpu_caches()
1326 L1I = L1D = CSHAPE(8*1024, 5, 1); in determine_cpu_caches()
1351 L1I = CSHAPE(16*1024, 6, 1); in determine_cpu_caches()
1354 L1I = CSHAPE(32*1024, 6, 2); in determine_cpu_caches()
1378 L1I = L1D = CSHAPE(64*1024, 6, 2); in determine_cpu_caches()
1385 L1I = L1D = CSHAPE(64*1024, 6, 2); in determine_cpu_caches()
[all …]
|
| /linux-5.19.10/arch/arm/kernel/ |
| D | perf_event_v7.c | 184 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
185 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
234 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
273 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
274 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
279 [C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
280 [C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
323 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
324 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
372 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
[all …]
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| D | perf_event_v6.c | 101 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS,
164 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ICACHE_MISS,
|
| /linux-5.19.10/drivers/perf/ |
| D | riscv_pmu_sbi.c | 122 [C(L1I)] = {
125 C(OP_READ), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
127 C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
131 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
133 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
137 C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
139 C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
|
| /linux-5.19.10/arch/powerpc/perf/ |
| D | e6500-pmu.c | 42 [C(L1I)] = {
|
| D | e500-pmu.c | 44 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| D | power10-pmu.c | 362 [C(L1I)] = {
463 [C(L1I)] = {
|
| D | generic-compat-pmu.c | 190 [ C(L1I) ] = {
|
| D | mpc7450-pmu.c | 371 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| D | power8-pmu.c | 271 [ C(L1I) ] = {
|
| D | power7-pmu.c | 345 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| D | ppc970-pmu.c | 444 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| D | power6-pmu.c | 493 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| D | power9-pmu.c | 342 [ C(L1I) ] = {
|
| /linux-5.19.10/arch/mips/kernel/ |
| D | perf_event_mipsxx.c | 1026 [C(L1I)] = {
1107 [C(L1I)] = {
1176 [C(L1I)] = {
1220 [C(L1I)] = {
1276 [C(L1I)] = {
1340 [C(L1I)] = {
1393 [C(L1I)] = {
1444 [C(L1I)] = {
|
| /linux-5.19.10/arch/sh/kernel/cpu/sh4a/ |
| D | perf_event.c | 131 [ C(L1I) ] = {
|
| /linux-5.19.10/arch/x86/events/intel/ |
| D | p6.c | 42 [ C(L1I ) ] = {
|
| D | knc.c | 45 [ C(L1I ) ] = {
|
| D | core.c | 479 [ C(L1I ) ] = {
630 [ C(L1I ) ] = {
858 [ C(L1I ) ] = {
1014 [ C(L1I ) ] = {
1166 [ C(L1I ) ] = {
1349 [ C(L1I ) ] = {
1464 [ C(L1I ) ] = {
1555 [ C(L1I ) ] = {
1706 [ C(L1I ) ] = {
1840 [C(L1I)] = {
[all …]
|
| /linux-5.19.10/arch/sh/kernel/cpu/sh4/ |
| D | perf_event.c | 106 [ C(L1I) ] = {
|
| /linux-5.19.10/arch/x86/events/zhaoxin/ |
| D | core.c | 65 [C(L1I)] = {
169 [C(L1I)] = {
|
| /linux-5.19.10/arch/arm64/kernel/ |
| D | perf_event.c | 63 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE,
64 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL,
128 [C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_ACCESS,
129 [C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_MISS,
|
| /linux-5.19.10/arch/sparc/kernel/ |
| D | perf_event.c | 235 [C(L1I)] = {
373 [C(L1I)] = {
508 [C(L1I)] = {
645 [C(L1I)] = {
|
| /linux-5.19.10/arch/x86/events/amd/ |
| D | core.c | 45 [ C(L1I ) ] = {
149 [C(L1I)] = {
|
| /linux-5.19.10/arch/xtensa/kernel/ |
| D | perf_event.c | 84 [C(L1I)] = {
|
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