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/linux-5.19.10/arch/alpha/lib/
Dev67-strncat.S58 bsr $23, __stxncpy # L0 :/* Now do the append. */
65 ret # L0 :
81 ret # L0 :
87 ret # L0 :
93 ret # L0 :
Dev6-memset.S214 ret $31,($26),1 # L0 :
231 ret $31,($26),1 # L0 :
392 ret $31,($26),1 # L0 :
409 ret $31,($26),1 # L0 :
580 ret $31,($26),1 # L0 :
597 ret $31,($26),1 # L0 :
Dev6-divide.S208 ret $31,($23),1 # L0 : L U U L
246 bsr $23,ufunction # L0: L U L U
261 ret $31,($23),1 # L0 : L U U L
Dev6-memchr.S96 ret # L0 : L U L U
120 ret # L0 : L U L U
190 ret # L0 :
Dev6-memcpy.S87 ldq $6, 0($17) # L0 : bytes 0..7
176 ret $31, ($26), 1 # L0 :
240 ret $31, ($26), 1 # L0 :
Dev6-stxncpy.S133 ret (t9) # L0 : Latency=3
140 br $a_eos # L0 : Latency=3
312 ret (t9) # L0 : Latency=3
333 br $u_final # L0 : Latency=3
393 ret (t9) # L0 : Latency=3
Dev67-strlen.S48 ret $31, ($26) # L0 :
Dev67-strcat.S53 br __stxcpy # L0 :
Dev6-copy_user.S119 br $31, $dirtyentry # L0 .. .. .. : L U U L
224 ret $31,($26),1 # L0 .. .. .. : L U L U
Dev6-stxcpy.S109 ret (t9) # L0 : Latency=3
135 br stxcpy_aligned # L0 : Latency=3
259 ret (t9) # L0 : Latency=3
Dev67-strchr.S87 ret # L0 :
Dev6-csum_ipv6_magic.S150 ret # L0 : L U L U
Dev67-strrchr.S106 ret # L0 : Latency=3
/linux-5.19.10/Documentation/virt/kvm/x86/
Drunning-nested-guests.rst23 | L0 (Host Hypervisor) |
31 - L0 – level-0; the bare metal host, running KVM
33 - L1 – level-1 guest; a VM running on L0; also called the "guest
44 resulting in at least four levels in a nested setup — L0 (bare
48 This document will stick with the three-level terminology (L0,
88 1. On the bare metal host (L0), list the kernel modules and ensure that
128 metal host (L0). Parameters for Intel hosts::
147 Once your bare metal host (L0) is configured for nesting, you should be
165 1. On the host hypervisor (L0), enable the ``nested`` parameter on
217 L0, L1 and L2; this can result in tedious back-n-forth between the bug
[all …]
Dnested-vmx.rst33 L0, the guest hypervisor, which we call L1, and its nested guest, which we
74 also have "vmcs01", the VMCS that L0 built for L1, and "vmcs02" is the VMCS
75 which L0 builds to actually run L2 - how this is done is explained in the
/linux-5.19.10/drivers/cpufreq/
Ds5pv210-cpufreq.c110 L0, L1, L2, L3, L4, enumerator
125 {0, L0, 1000*1000},
145 [L0] = {
264 if ((index == L0) || (priv_index == L0)) in s5pv210_target()
383 if (index == L0) in s5pv210_target()
/linux-5.19.10/arch/xtensa/lib/
Dmemset.S47 .L0: # return here from .Ldstunaligned when dst is aligned label
113 bbci.l a5, 1, .L0 # if now aligned, return to main algorithm
120 j .L0 # dst is now aligned, return to main algorithm
/linux-5.19.10/arch/sh/lib/
D__clear_user.S36 .L0: dt r3 define
38 bf/s .L0
/linux-5.19.10/arch/sparc/net/
Dbpf_jit_64.h20 #define L0 0x10 macro
/linux-5.19.10/arch/arm/mach-omap2/
Dsram243x.S62 mov r9, #0x0 @ shift back to L0-voltage
67 str r3, [r2] @ go to L0-freq operation
101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
Dsram242x.S62 mov r9, #0x0 @ shift back to L0-voltage
67 str r3, [r2] @ go to L0-freq operation
101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
/linux-5.19.10/arch/powerpc/kvm/
DKconfig145 bool "Nested L0 host workaround for L1 KVM host PMU handling bug" if EXPERT
150 reflect the PMU in-use status of their L2 guest to the L0 host
155 Selecting this option for the L0 host implements a workaround for
/linux-5.19.10/Documentation/translations/zh_CN/arm64/
Dmemory.txt91 | +-------------------------------> [47:39] L0 索引
/linux-5.19.10/Documentation/translations/zh_TW/arm64/
Dmemory.txt95 | +-------------------------------> [47:39] L0 索引
/linux-5.19.10/arch/arm/boot/dts/
Daspeed-bmc-qcom-dc-scm-v1.dts106 /*L0-L7*/ "","","","","","","","",

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