/linux-5.19.10/drivers/pinctrl/renesas/ |
D | pfc-r8a77970.c | 100 #define GPSR2_15 F_(VI0_DATA11, IP4_27_24) 201 #define IP4_27_24 FM(VI0_DATA11) FM(HTX2) FM(PWM3_A) FM(A25) FM(FSO_TOE_N_B) F_(0, 0) F_(0, 0)… macro 283 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ 554 PINMUX_IPSR_GPSR(IP4_27_24, VI0_DATA11), 555 PINMUX_IPSR_GPSR(IP4_27_24, HTX2), 556 PINMUX_IPSR_MSEL(IP4_27_24, PWM3_A, SEL_PWM3_0), 557 PINMUX_IPSR_MSEL(IP4_27_24, FSO_TOE_N_B, SEL_RFSO_1), 2273 IP4_27_24
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D | pfc-r8a77980.c | 114 #define GPSR2_15 F_(VI0_DATA11, IP4_27_24) 234 #define IP4_27_24 FM(VI0_DATA11) FM(HTX2) FM(PWM3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro 332 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ 632 PINMUX_IPSR_GPSR(IP4_27_24, VI0_DATA11), 633 PINMUX_IPSR_GPSR(IP4_27_24, HTX2), 634 PINMUX_IPSR_MSEL(IP4_27_24, PWM3_A, SEL_PWM3_0), 2726 IP4_27_24
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D | pfc-r8a77990.c | 94 #define GPSR1_15 F_(A15, IP4_27_24) 253 #define IP4_27_24 FM(A15) FM(MSIOF1_SS2) FM(MSIOF2_TXD_B) FM(VI4_DATA18) FM(VI5_DATA4_A) FM(DU… macro 400 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ 778 PINMUX_IPSR_GPSR(IP4_27_24, A15), 779 PINMUX_IPSR_GPSR(IP4_27_24, MSIOF1_SS2), 780 PINMUX_IPSR_GPSR(IP4_27_24, MSIOF2_TXD_B), 781 PINMUX_IPSR_GPSR(IP4_27_24, VI4_DATA18), 782 PINMUX_IPSR_MSEL(IP4_27_24, VI5_DATA4_A, SEL_VIN5_0), 783 PINMUX_IPSR_GPSR(IP4_27_24, DU_DB4), 784 PINMUX_IPSR_GPSR(IP4_27_24, LCDOUT4), [all …]
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D | pfc-r8a77995.c | 56 #define GPSR1_31 F_(QPOLB, IP4_27_24) 249 #define IP4_27_24 FM(QPOLB) F_(0, 0) FM(TX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… macro 374 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ 685 PINMUX_IPSR_GPSR(IP4_27_24, QPOLB), 686 PINMUX_IPSR_MSEL(IP4_27_24, TX3_B, SEL_SCIF3_1), 2714 IP4_27_24
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D | pfc-r8a77950.c | 103 #define GPSR1_23 F_(RD_N, IP4_27_24) 293 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro 450 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ 882 PINMUX_IPSR_GPSR(IP4_27_24, RD_N), 883 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3), 884 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0), 885 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0), 886 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0), 887 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0), 4951 IP4_27_24
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D | pfc-r8a77965.c | 109 #define GPSR1_23 F_(RD_N, IP4_27_24) 299 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro 465 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ 895 PINMUX_IPSR_GPSR(IP4_27_24, RD_N), 896 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3), 897 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0), 898 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0), 899 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0), 900 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0), 5585 IP4_27_24
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D | pfc-r8a77951.c | 104 #define GPSR1_23 F_(RD_N, IP4_27_24) 294 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro 460 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ 889 PINMUX_IPSR_GPSR(IP4_27_24, RD_N), 890 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3), 891 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0), 892 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0), 893 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0), 894 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0), 5389 IP4_27_24
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D | pfc-r8a7796.c | 109 #define GPSR1_23 F_(RD_N, IP4_27_24) 299 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro 465 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ 893 PINMUX_IPSR_GPSR(IP4_27_24, RD_N), 894 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3), 895 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0), 896 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0), 897 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0), 898 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0), 5344 IP4_27_24
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D | pfc-r8a77470.c | 696 PINMUX_IPSR_GPSR(IP4_27_24, DU0_DR5), 697 PINMUX_IPSR_MSEL(IP4_27_24, TX1_D, SEL_SCIF1_3), 698 PINMUX_IPSR_GPSR(IP4_27_24, PWM1_B), 699 PINMUX_IPSR_GPSR(IP4_27_24, A5),
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