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Searched refs:IP2_15_12 (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/drivers/pinctrl/renesas/
Dpfc-r8a77970.c47 #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
182 #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(HRX0) F_(0, 0) FM(A19) FM(IRQ3) F_(0, 0) F_(0, 0) … macro
271 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
470 PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC),
471 PINMUX_IPSR_GPSR(IP2_15_12, HRX0),
472 PINMUX_IPSR_GPSR(IP2_15_12, A19),
473 PINMUX_IPSR_GPSR(IP2_15_12, IRQ3),
2256 IP2_15_12
Dpfc-r8a77980.c48 #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
215 #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(MSIOF3_SS2) FM(GETHER_PHY_INT_B) FM(A19) FM(FXR_TXE… macro
320 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
551 PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC),
552 PINMUX_IPSR_GPSR(IP2_15_12, MSIOF3_SS2),
553 PINMUX_IPSR_MSEL(IP2_15_12, GETHER_PHY_INT_B, SEL_GETHER_1),
554 PINMUX_IPSR_GPSR(IP2_15_12, A19),
555 PINMUX_IPSR_GPSR(IP2_15_12, FXR_TXENA_N),
2709 IP2_15_12
Dpfc-r8a7779.c760 PINMUX_IPSR_MSEL(IP2_15_12, HRTS0, SEL_HSCIF0_0),
761 PINMUX_IPSR_MSEL(IP2_15_12, RTS1_TANS, SEL_SCIF1_0),
762 PINMUX_IPSR_GPSR(IP2_15_12, MDATA),
763 PINMUX_IPSR_GPSR(IP2_15_12, TX0_C),
764 PINMUX_IPSR_GPSR(IP2_15_12, SUB_TMS),
765 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE1),
766 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE9),
767 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE17),
768 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE25),
769 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE33),
Dpfc-r8a77995.c75 #define GPSR1_12 F_(DU_DG4, IP2_15_12)
228 #define IP2_15_12 FM(DU_DG4) FM(LCDOUT12) FM(HSCK3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro
362 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
608 PINMUX_IPSR_GPSR(IP2_15_12, DU_DG4),
609 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT12),
610 PINMUX_IPSR_MSEL(IP2_15_12, HSCK3_B, SEL_HSCIF3_1),
2697 IP2_15_12
Dpfc-r8a77990.c115 #define GPSR2_22 F_(BS_N, IP2_15_12)
232 #define IP2_15_12 FM(BS_N) FM(PWM0_A) FM(AVB_MAGIC) FM(VI4_CLK) F_(0, 0) FM(TX3_C) F_(0, 0) FM… macro
388 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
622 PINMUX_IPSR_GPSR(IP2_15_12, BS_N),
623 PINMUX_IPSR_MSEL(IP2_15_12, PWM0_A, SEL_PWM0_0),
624 PINMUX_IPSR_GPSR(IP2_15_12, AVB_MAGIC),
625 PINMUX_IPSR_GPSR(IP2_15_12, VI4_CLK),
626 PINMUX_IPSR_GPSR(IP2_15_12, TX3_C),
627 PINMUX_IPSR_MSEL(IP2_15_12, VI5_CLK_B, SEL_VIN5_1),
4811 IP2_15_12
Dpfc-r8a77950.c122 #define GPSR1_4 F_(A4, IP2_15_12)
274 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
438 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
757 PINMUX_IPSR_GPSR(IP2_15_12, A4),
758 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
759 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
760 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
761 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
762 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
4934 IP2_15_12
Dpfc-r8a77965.c128 #define GPSR1_4 F_(A4, IP2_15_12)
278 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
453 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
770 PINMUX_IPSR_GPSR(IP2_15_12, A4),
771 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
772 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
773 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
774 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
775 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5568 IP2_15_12
Dpfc-r8a77951.c123 #define GPSR1_4 F_(A4, IP2_15_12)
275 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
448 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
764 PINMUX_IPSR_GPSR(IP2_15_12, A4),
765 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
766 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
767 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
768 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
769 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5372 IP2_15_12
Dpfc-r8a7796.c128 #define GPSR1_4 F_(A4, IP2_15_12)
278 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
453 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
768 PINMUX_IPSR_GPSR(IP2_15_12, A4),
769 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
770 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
771 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
772 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
773 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5327 IP2_15_12
Dpfc-r8a77470.c629 PINMUX_IPSR_GPSR(IP2_15_12, D9),
630 PINMUX_IPSR_GPSR(IP2_15_12, HRTS2_N),
631 PINMUX_IPSR_MSEL(IP2_15_12, TX1_C, SEL_SCIF1_2),
632 PINMUX_IPSR_MSEL(IP2_15_12, SDA1_D, SEL_I2C01_3),