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Searched refs:IMX_SC_R_ENET_1 (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/arch/arm64/boot/dts/freescale/
Dimx8-ss-conn.dtsi103 assigned-clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>,
104 <&clk IMX_SC_R_ENET_1 IMX_SC_C_CLKDIV>;
108 power-domains = <&pd IMX_SC_R_ENET_1>;
181 clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>,
182 <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>,
184 <&clk IMX_SC_R_ENET_1 IMX_SC_C_TXCLK>,
196 power-domains = <&pd IMX_SC_R_ENET_1>;
/linux-5.19.10/drivers/clk/imx/
Dclk-imx8qxp.c174 imx_clk_scu("enet1_root_clk", IMX_SC_R_ENET_1, IMX_SC_PM_CLK_PER); in imx8qxp_clk_probe()
175 imx_clk_divider_gpr_scu("enet1_ref_div", "enet1_root_clk", IMX_SC_R_ENET_1, IMX_SC_C_CLKDIV); in imx8qxp_clk_probe()
176 …ii_txc_sel", enet1_rgmii_txc_sels, ARRAY_SIZE(enet1_rgmii_txc_sels), IMX_SC_R_ENET_1, IMX_SC_C_TXC… in imx8qxp_clk_probe()
177 imx_clk_scu("enet1_bypass_clk", IMX_SC_R_ENET_1, IMX_SC_PM_CLK_BYPASS); in imx8qxp_clk_probe()
178 imx_clk_gate_gpr_scu("enet1_ref_50_clk", "clk_dummy", IMX_SC_R_ENET_1, IMX_SC_C_DISABLE_50, true); in imx8qxp_clk_probe()
179 imx_clk_scu("enet1_rgmii_rx_clk", IMX_SC_R_ENET_1, IMX_SC_PM_CLK_MISC0); in imx8qxp_clk_probe()
Dclk-imx8dxl-rsrc.c49 IMX_SC_R_ENET_1,
Dclk-imx8qxp-rsrc.c56 IMX_SC_R_ENET_1,
Dclk-imx8qm-rsrc.c67 IMX_SC_R_ENET_1,
/linux-5.19.10/include/dt-bindings/firmware/imx/
Drsrc.h259 #define IMX_SC_R_ENET_1 252 macro