Searched refs:IMX8ULP_CLK_SPLL3_PFD0_DIV2 (Results 1 – 2 of 2) sorted by relevance
23 #define IMX8ULP_CLK_SPLL3_PFD0_DIV2 16 macro
188 …clks[IMX8ULP_CLK_SPLL3_PFD0_DIV2] = imx_clk_hw_divider("spll3_pfd0_div2", "spll3_pfd0_div2_gate", … in imx8ulp_clk_cgc1_init()