Searched refs:IMX8ULP_CLK_SPLL3_PFD0_DIV1 (Results 1 – 2 of 2) sorted by relevance
22 #define IMX8ULP_CLK_SPLL3_PFD0_DIV1 15 macro
187 …clks[IMX8ULP_CLK_SPLL3_PFD0_DIV1] = imx_clk_hw_divider("spll3_pfd0_div1", "spll3_pfd0_div1_gate", … in imx8ulp_clk_cgc1_init()