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Searched refs:IMX8ULP_CLK_PLL4_PFD0_DIV1 (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dimx8ulp-clock.h88 #define IMX8ULP_CLK_PLL4_PFD0_DIV1 21 macro
/linux-5.19.10/drivers/clk/imx/
Dclk-imx8ulp.c278 …clks[IMX8ULP_CLK_PLL4_PFD0_DIV1] = imx_clk_hw_divider("pll4_pfd0_div1", "pll4_pfd0_div1_gate", bas… in imx8ulp_clk_cgc2_init()