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Searched refs:HHI_VID_CLK_DIV (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/meson/
Dmeson_vclk.c66 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
314 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_venci_cvbs_clock_config()
887 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
950 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
954 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
964 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
968 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
978 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
982 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
992 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
[all …]
/linux-5.19.10/drivers/clk/meson/
Daxg.h61 #define HHI_VID_CLK_DIV 0x164 macro
Dgxbb.h44 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
Dmeson8b.h35 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
Dg12a.h62 #define HHI_VID_CLK_DIV 0x164 macro
Dmeson8b.c1210 .offset = HHI_VID_CLK_DIV,
1252 .offset = HHI_VID_CLK_DIV,
1611 .offset = HHI_VID_CLK_DIV,
1642 .offset = HHI_VID_CLK_DIV,
1673 .offset = HHI_VID_CLK_DIV,
Dgxbb.c1906 .offset = HHI_VID_CLK_DIV,
1934 .offset = HHI_VID_CLK_DIV,
2254 .offset = HHI_VID_CLK_DIV,
2270 .offset = HHI_VID_CLK_DIV,
Daxg.c1329 .offset = HHI_VID_CLK_DIV,
1357 .offset = HHI_VID_CLK_DIV,
Dg12a.c3172 .offset = HHI_VID_CLK_DIV,
3200 .offset = HHI_VID_CLK_DIV,
3520 .offset = HHI_VID_CLK_DIV,
3536 .offset = HHI_VID_CLK_DIV,