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Searched refs:HHI_MEM_PD_REG0 (Results 1 – 5 of 5) sorted by relevance

/linux-5.19.10/drivers/soc/amlogic/
Dmeson-ee-pwrc.c39 #define HHI_MEM_PD_REG0 (0x40 << 2) macro
141 VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
148 VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
154 VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
158 { HHI_MEM_PD_REG0, GENMASK(3, 2) },
162 { HHI_MEM_PD_REG0, GENMASK(1, 0) },
168 VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
180 VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
189 { HHI_MEM_PD_REG0, GENMASK(31, 30) },
193 { HHI_MEM_PD_REG0, GENMASK(29, 26) },
[all …]
Dmeson-gx-pwrc-vpu.c28 #define HHI_MEM_PD_REG0 (0x40 << 2) macro
69 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_off()
112 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_off()
168 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_on()
222 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_on()
/linux-5.19.10/drivers/clk/meson/
Daxg.h49 #define HHI_MEM_PD_REG0 0x100 macro
Dgxbb.h30 #define HHI_MEM_PD_REG0 0x100 /* 0x40 offset in data sheet */ macro
/linux-5.19.10/drivers/gpu/drm/meson/
Dmeson_dw_hdmi.c104 #define HHI_MEM_PD_REG0 0x100 /* 0x40 */ macro
391 regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0); in dw_hdmi_phy_init()
635 regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0); in meson_dw_hdmi_init()