Searched refs:HHI_HDMI_PHY_CNTL1 (Results 1 – 3 of 3) sorted by relevance
| /linux-5.19.10/drivers/phy/amlogic/ |
| D | phy-meson8-hdmi-tx.c | 29 #define HHI_HDMI_PHY_CNTL1 0x3a4 macro
71 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, 0x0); in phy_meson8_hdmi_tx_power_on()
75 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, in phy_meson8_hdmi_tx_power_on()
80 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, in phy_meson8_hdmi_tx_power_on()
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| /linux-5.19.10/drivers/gpu/drm/meson/ |
| D | meson_dw_hdmi.c | 107 #define HHI_HDMI_PHY_CNTL1 0x3a4 /* 0xe9 */ macro
358 regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xf); in meson_dw_hdmi_phy_reset()
363 regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xe); in meson_dw_hdmi_phy_reset()
429 regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, in dw_hdmi_phy_init()
436 regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, in dw_hdmi_phy_init()
439 regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, in dw_hdmi_phy_init()
443 regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0); in dw_hdmi_phy_init()
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| /linux-5.19.10/drivers/clk/meson/ |
| D | gxbb.h | 107 #define HHI_HDMI_PHY_CNTL1 0x3A4 /* 0xe9 offset in data sheet */ macro
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