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Searched refs:HHI_HDMI_CLK_CNTL (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/meson/
Dmeson_vclk.c89 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
817 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
819 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
821 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
898 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
907 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
916 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
925 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
934 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
Dmeson_dw_hdmi.c105 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */ macro
388 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); in dw_hdmi_phy_init()
632 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); in meson_dw_hdmi_init()
/linux-5.19.10/drivers/clk/meson/
Dgxbb.h57 #define HHI_HDMI_CLK_CNTL 0x1CC /* 0x73 offset in data sheet */ macro
Dmeson8b.h45 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
Dg12a.h74 #define HHI_HDMI_CLK_CNTL 0x1CC macro
Dgxbb.c2317 .offset = HHI_HDMI_CLK_CNTL,
2412 .offset = HHI_HDMI_CLK_CNTL,
2428 .offset = HHI_HDMI_CLK_CNTL,
2443 .offset = HHI_HDMI_CLK_CNTL,
Dmeson8b.c1704 .offset = HHI_HDMI_CLK_CNTL,
1805 .offset = HHI_HDMI_CLK_CNTL,
1826 .offset = HHI_HDMI_CLK_CNTL,
1843 .offset = HHI_HDMI_CLK_CNTL,
Dg12a.c3583 .offset = HHI_HDMI_CLK_CNTL,
3734 .offset = HHI_HDMI_CLK_CNTL,
3750 .offset = HHI_HDMI_CLK_CNTL,
3765 .offset = HHI_HDMI_CLK_CNTL,