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Searched refs:HCLK_VPU (Results 1 – 13 of 13) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Drv1108-cru.h164 #define HCLK_VPU 345 macro
166 #define CLK_NR_CLKS (HCLK_VPU + 1)
Drk3228-cru.h133 #define HCLK_VPU 464 macro
Dpx30-cru.h120 #define HCLK_VPU 244 macro
Drk3328-cru.h188 #define HCLK_VPU 326 macro
Drk3568-cru.h302 #define HCLK_VPU 239 macro
/linux-5.19.10/arch/arm/boot/dts/
Drk322x.dtsi228 <&cru HCLK_VPU>;
621 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
631 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
/linux-5.19.10/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi317 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
640 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
651 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
661 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
Dpx30.dtsi288 <&cru HCLK_VPU>,
1058 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
1068 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
/linux-5.19.10/drivers/clk/rockchip/
Dclk-rk3228.c632 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 1, GFLAGS),
Dclk-rv1108.c258 GATE(HCLK_VPU, "hclk_vpu", "hclk_rkvdec_pre", 0,
Dclk-rk3328.c529 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", CLK_SET_RATE_PARENT,
Dclk-px30.c873 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, PX30_CLKGATE_CON(4), 6, GFLAGS),
Dclk-rk3568.c1089 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0,