Searched refs:HCLK_DMA0 (Results 1 – 7 of 7) sorted by relevance
| /linux-5.19.10/include/dt-bindings/clock/ |
| D | s3c2412.h | 65 #define HCLK_DMA0 57 macro
68 #define NR_CLKS (HCLK_DMA0 + 1)
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| D | s3c2443.h | 47 #define HCLK_DMA0 48 macro
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| D | samsung,s3c64xx-clock.h | 48 #define HCLK_DMA0 33 macro
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| /linux-5.19.10/drivers/clk/samsung/ |
| D | clk-s3c64xx.c | 210 GATE_BUS(HCLK_DMA0, "hclk_dma0", "hclk", HCLK_GATE, 12),
330 ALIAS(HCLK_DMA0, "dma-pl080s.0", "apb_pclk"),
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| D | clk-s3c2412.c | 133 GATE(HCLK_DMA0, "dma0", "hclk", CLKCON, 0, CLK_IGNORE_UNUSED, 0),
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| D | clk-s3c2443.c | 129 GATE(HCLK_DMA0, "dma0", "hclk", HCLKCON, 0, CLK_IGNORE_UNUSED, 0),
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| /linux-5.19.10/drivers/clk/renesas/ |
| D | r9a06g032-clocks.c | 241 D_MODULE(HCLK_DMA0, "hclk_dma0", CLK_REF_SYNC_D4, 0x260, 0x261, 0x262, 0x263, 0x2c0, 0x2c1, 0x2c2),
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