Home
last modified time | relevance | path

Searched refs:GT_DEF_PCI0_IO_BASE (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/arch/mips/cobalt/
Dpci.c37 .io_offset = 0 - GT_DEF_PCI0_IO_BASE,
38 .io_map_base = CKSEG1ADDR(GT_DEF_PCI0_IO_BASE),
Dsetup.c84 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); in plat_mem_setup()
/linux-5.19.10/arch/mips/include/asm/
Dgt64120.h531 #define GT_DEF_PCI0_IO_BASE 0x10000000UL macro