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Searched refs:GENMO_WT__VGA_CKSEL__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7174 #define GENMO_WT__VGA_CKSEL__SHIFT 0x00000002 macro
Ddce_8_0_sh_mask.h10612 #define GENMO_WT__VGA_CKSEL__SHIFT 0x2 macro
Ddce_10_0_sh_mask.h10996 #define GENMO_WT__VGA_CKSEL__SHIFT 0x2 macro
Ddce_11_0_sh_mask.h10808 #define GENMO_WT__VGA_CKSEL__SHIFT 0x2 macro
Ddce_11_2_sh_mask.h12062 #define GENMO_WT__VGA_CKSEL__SHIFT 0x2 macro
Ddce_12_0_sh_mask.h2205 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h242 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
Ddcn_1_0_sh_mask.h844 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
Ddcn_3_0_1_sh_mask.h337 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
Ddcn_3_1_2_sh_mask.h337 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
Ddcn_3_1_5_sh_mask.h5145 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
Ddcn_3_0_2_sh_mask.h255 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
Ddcn_3_1_6_sh_mask.h352 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
Ddcn_2_0_0_sh_mask.h255 #define GENMO_WT__VGA_CKSEL__SHIFT … macro
Ddcn_3_0_0_sh_mask.h235 #define GENMO_WT__VGA_CKSEL__SHIFT … macro