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Searched refs:GEM_DEBUG_WARN_ON (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/i915/
Di915_gem.h58 #define GEM_DEBUG_WARN_ON(expr) GEM_WARN_ON(expr) macro
68 #define GEM_DEBUG_WARN_ON(expr) ({ BUILD_BUG_ON_INVALID(expr); 0; }) macro
Di915_vma.c442 if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start, in i915_vma_bind()
449 if (GEM_DEBUG_WARN_ON(!flags)) { in i915_vma_bind()
/linux-5.19.10/drivers/gpu/drm/i915/gt/
Dintel_engine_user.c170 if (GEM_DEBUG_WARN_ON(ring->class >= ARRAY_SIZE(map))) in legacy_ring_idx()
173 if (GEM_DEBUG_WARN_ON(ring->instance >= map[ring->class].max)) in legacy_ring_idx()
Dintel_mocs.c480 if (GEM_DEBUG_WARN_ON(table->size > table->n_entries)) in get_mocs_settings()
488 if (GEM_DEBUG_WARN_ON(table->table[i].l3cc_value & in get_mocs_settings()
Dintel_gt.c889 GEM_DEBUG_WARN_ON(!gt->info.l3bank_mask); /* should be impossible! */ in intel_gt_get_valid_steering()
895 GEM_DEBUG_WARN_ON(!gt->info.mslice_mask); /* should be impossible! */ in intel_gt_get_valid_steering()
901 GEM_DEBUG_WARN_ON(!gt->info.mslice_mask); /* should be impossible! */ in intel_gt_get_valid_steering()
Dintel_engine_cs.c326 GEM_DEBUG_WARN_ON(iir); in nop_irq_handler()
386 if (GEM_DEBUG_WARN_ON(id >= ARRAY_SIZE(gt->engine))) in intel_engine_setup()
389 if (GEM_DEBUG_WARN_ON(info->class > MAX_ENGINE_CLASS)) in intel_engine_setup()
392 if (GEM_DEBUG_WARN_ON(info->instance > MAX_ENGINE_INSTANCE)) in intel_engine_setup()
395 if (GEM_DEBUG_WARN_ON(gt->engine_class[info->class][info->instance])) in intel_engine_setup()
Dintel_workarounds.c1672 if (GEM_DEBUG_WARN_ON(wal->count >= RING_MAX_NONPRIV_SLOTS)) in whitelist_reg_ext()
1675 if (GEM_DEBUG_WARN_ON(!is_nonpriv_flags_valid(flags))) in whitelist_reg_ext()
Dintel_ring_submission.c120 GEM_DEBUG_WARN_ON((ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE) == 0); in flush_cs_tlb()
Dintel_lrc.c1735 if (GEM_DEBUG_WARN_ON(!IS_ALIGNED(wa_bb[i]->offset, in lrc_init_wa_ctx()