Searched refs:EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG (Results 1 – 3 of 3) sorted by relevance
88 { EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
104 { EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
431 #define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG 0x1340 macro