Searched refs:EVERGREEN_CRTC3_REGISTER_OFFSET (Results 1 – 9 of 9) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/radeon/ |
D | evergreen_reg.h | 227 #define EVERGREEN_CRTC3_REGISTER_OFFSET (0x111f0 - 0x6df0) macro
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D | radeon_display.c | 1508 EVERGREEN_CRTC3_REGISTER_OFFSET, in radeon_afmt_init() 1854 EVERGREEN_CRTC3_REGISTER_OFFSET); in radeon_get_crtc_scanoutpos() 1856 EVERGREEN_CRTC3_REGISTER_OFFSET); in radeon_get_crtc_scanoutpos()
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D | radeon_dp_mst.c | 19 EVERGREEN_CRTC3_REGISTER_OFFSET, in radeon_atom_set_enc_offset()
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D | cik.c | 6885 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); in cik_disable_interrupt_state() 6898 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); in cik_disable_interrupt_state() 7237 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, crtc4); in cik_irq_set() 7253 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, in cik_irq_set() 7305 EVERGREEN_CRTC3_REGISTER_OFFSET); in cik_irq_ack() 7334 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, in cik_irq_ack() 7341 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack() 7343 WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VLINE_ACK); in cik_irq_ack()
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D | radeon_device.c | 679 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET); in radeon_card_posted()
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D | evergreen_cs.c | 1031 EVERGREEN_VLINE_START_END + EVERGREEN_CRTC3_REGISTER_OFFSET, in evergreen_cs_packet_parse_vline() 1039 EVERGREEN_VLINE_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, in evergreen_cs_packet_parse_vline()
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D | atombios_crtc.c | 2252 radeon_crtc->crtc_offset = EVERGREEN_CRTC3_REGISTER_OFFSET; in radeon_atombios_init_crtc()
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D | evergreen.c | 126 EVERGREEN_CRTC3_REGISTER_OFFSET,
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D | si.c | 146 EVERGREEN_CRTC3_REGISTER_OFFSET,
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