Searched refs:DVSCNTR (Results 1 – 2 of 2) sorted by relevance
1226 intel_de_write_fw(dev_priv, DVSCNTR(pipe), dvscntr); in g4x_sprite_update_arm()1243 intel_de_write_fw(dev_priv, DVSCNTR(pipe), 0); in g4x_sprite_disable_arm()1263 ret = intel_de_read(dev_priv, DVSCNTR(plane->pipe)) & DVS_ENABLE; in g4x_sprite_get_hw_state()
4561 #define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR) macro