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Searched refs:DP_LANE_ALIGN_STATUS_UPDATED (Results 1 – 5 of 5) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/display/
Ddrm_dp_helper.c81 DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_channel_eq_ok()
155 lane_align = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_lane_channel_eq_done()
187 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_eq_interlane_align_done()
196 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_cds_interlane_align_done()
205 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_link_training_failed()
/linux-5.19.10/drivers/gpu/drm/bridge/analogix/
Danalogix_dp_core.c562 retval = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, in analogix_dp_process_equalizer_training()
753 ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, in analogix_dp_fast_link_train()
/linux-5.19.10/include/drm/display/
Ddrm_dp.h737 #define DP_LANE_ALIGN_STATUS_UPDATED 0x204 macro
/linux-5.19.10/drivers/gpu/drm/msm/dp/
Ddp_link.c985 if (get_link_status(link->link_status, DP_LANE_ALIGN_STATUS_UPDATED) & in dp_link_process_ds_port_status_change()
/linux-5.19.10/drivers/gpu/drm/gma500/
Dcdv_intel_dp.c1339 DP_LANE_ALIGN_STATUS_UPDATED); in cdv_intel_channel_eq_ok()