Searched refs:DPLL_STATUS (Results 1 – 6 of 6) sorted by relevance
96 #define DPLL_STATUS 0x6010 macro296 REG_WRITE(DPLL_STATUS, 0x1); in oaktrail_crtc_hdmi_mode_set()422 REG_WRITE(DPLL_STATUS, 0x1); in oaktrail_crtc_hdmi_dpms()
384 vgpu_vreg_t(vgpu, DPLL_STATUS) = DPLL_LOCK(DPLL_ID_SKL_DPLL0); in emulate_monitor_status_change()
2599 MMIO_DH(DPLL_STATUS, D_SKL_PLUS, dpll_status_read, NULL); in init_skl_mmio_info()
922 MMIO_D(DPLL_STATUS); in iterate_skl_plus_mmio()
7695 #define DPLL_STATUS _MMIO(0x6C060) macro
1227 if (intel_de_wait_for_set(dev_priv, DPLL_STATUS, DPLL_LOCK(id), 5)) in skl_ddi_pll_enable()