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Searched refs:DOMAIN5_PG_STATUS (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_hwseq.h223 SR(DOMAIN5_PG_STATUS), \
277 SR(DOMAIN5_PG_STATUS), \
334 SR(DOMAIN5_PG_STATUS), \
438 SR(DOMAIN5_PG_STATUS), \
494 SR(DOMAIN5_PG_STATUS), \
613 uint32_t DOMAIN5_PG_STATUS; member
800 HWS_SF(, DOMAIN5_PG_STATUS, DOMAIN5_PGFSM_PWR_STATUS, mask_sh), \
855 HWS_SF(, DOMAIN5_PG_STATUS, DOMAIN5_PGFSM_PWR_STATUS, mask_sh), \
902 HWS_SF(, DOMAIN5_PG_STATUS, DOMAIN5_PGFSM_PWR_STATUS, mask_sh), \
953 HWS_SF(, DOMAIN5_PG_STATUS, DOMAIN5_PGFSM_PWR_STATUS, mask_sh), \
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_hwseq.c76 REG_WAIT(DOMAIN5_PG_STATUS, in dcn302_dpp_pg_control()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c454 REG_WAIT(DOMAIN5_PG_STATUS, in dcn20_dpp_pg_control()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.c648 REG_WAIT(DOMAIN5_PG_STATUS, in dcn10_dpp_pg_control()