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Searched refs:DMU_MEM_PWR_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_dmcu.h94 SR(DMU_MEM_PWR_CNTL)
174 DMCU_SF(DMU_MEM_PWR_CNTL, \
211 uint32_t DMU_MEM_PWR_CNTL; member
Ddce_dmcu.c344 REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dcn10_get_dmcu_version()
494 REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dcn10_dmcu_load_iram()
535 REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); in dcn10_get_dmcu_psr_state()
Ddce_link_encoder.h155 uint32_t DMU_MEM_PWR_CNTL; member
Ddce_hwseq.h668 uint32_t DMU_MEM_PWR_CNTL; member
920 HWS_SF(, DMU_MEM_PWR_CNTL, DMCU_ERAM_MEM_PWR_FORCE, mask_sh), \
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hwseq.c77 REG_UPDATE(DMU_MEM_PWR_CNTL, DMCU_ERAM_MEM_PWR_FORCE, 3); in enable_memory_low_power()
Ddcn31_resource.c680 SR(DMU_MEM_PWR_CNTL), \
764 HWS_SF(, DMU_MEM_PWR_CNTL, DMCU_ERAM_MEM_PWR_FORCE, mask_sh), \
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn315/
Ddcn315_resource.c677 SR(DMU_MEM_PWR_CNTL), \
761 HWS_SF(, DMU_MEM_PWR_CNTL, DMCU_ERAM_MEM_PWR_FORCE, mask_sh), \
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn316/
Ddcn316_resource.c677 SR(DMU_MEM_PWR_CNTL), \
761 HWS_SF(, DMU_MEM_PWR_CNTL, DMCU_ERAM_MEM_PWR_FORCE, mask_sh), \
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_hwseq.c492 REG_UPDATE(DMU_MEM_PWR_CNTL, DMCU_ERAM_MEM_PWR_FORCE, 3); in dcn30_init_hw()