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Searched refs:DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5785 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x00000400L macro
Ddce_8_0_sh_mask.h7895 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x400 macro
Ddce_10_0_sh_mask.h6923 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x400 macro
Ddce_11_0_sh_mask.h6825 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x400 macro
Ddce_11_2_sh_mask.h7897 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x400 macro
Ddce_12_0_sh_mask.h4881 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h1527 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
Ddcn_1_0_sh_mask.h3843 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
Ddcn_2_1_0_sh_mask.h2349 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
Ddcn_3_0_1_sh_mask.h2490 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
Ddcn_3_1_2_sh_mask.h1974 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
Ddcn_3_0_2_sh_mask.h2420 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
Ddcn_3_1_6_sh_mask.h2541 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
Ddcn_2_0_0_sh_mask.h2617 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
Ddcn_3_0_0_sh_mask.h2486 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro