Searched refs:DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT (Results 1 – 2 of 2) sorted by relevance
7761 #define DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy) (_DG1_DPCLKA_PHY_IDX(phy) * 2) macro7762 …_CFGCR0_DDI_CLK_SEL(pll, phy) (_DG1_DPCLKA_PLL_IDX(pll) << DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy…7763 #define DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy) (0x3 << DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy))
1600 val >>= DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy); in dg1_ddi_get_pll()