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Searched refs:DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK (Results 1 – 17 of 17) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h3005 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK 0x00000080L macro
Ddce_8_0_sh_mask.h1647 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK 0x80 macro
Ddce_10_0_sh_mask.h1649 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK 0x80 macro
Ddce_11_0_sh_mask.h1597 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK 0x80 macro
Ddce_11_2_sh_mask.h1759 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK 0x80 macro
Ddce_12_0_sh_mask.h2656 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h146 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_3_0_3_sh_mask.h534 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_1_0_sh_mask.h2020 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_2_1_0_sh_mask.h476 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_3_0_1_sh_mask.h864 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_3_1_2_sh_mask.h796 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_3_1_5_sh_mask.h299 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_3_0_2_sh_mask.h589 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_3_1_6_sh_mask.h1333 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_2_0_0_sh_mask.h594 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro
Ddcn_3_0_0_sh_mask.h574 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_HSYNC_MASK … macro