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Searched refs:DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK (Results 1 – 17 of 17) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/ !
Ddce_6_0_sh_mask.h2993 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x00000001L macro
Ddce_8_0_sh_mask.h1423 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x1 macro
Ddce_10_0_sh_mask.h1451 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x1 macro
Ddce_11_0_sh_mask.h1359 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x1 macro
Ddce_11_2_sh_mask.h1481 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x1 macro
Ddce_12_0_sh_mask.h2525 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/ !
Ddcn_2_0_3_sh_mask.h93 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_3_0_3_sh_mask.h471 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_1_0_sh_mask.h1943 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_2_1_0_sh_mask.h408 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_3_0_1_sh_mask.h796 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_3_1_2_sh_mask.h702 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_3_1_5_sh_mask.h205 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_3_0_2_sh_mask.h521 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_3_1_6_sh_mask.h1239 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_2_0_0_sh_mask.h526 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro
Ddcn_3_0_0_sh_mask.h506 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK … macro