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Searched refs:D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK (Results 1 – 16 of 16) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h2527 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK 0x00000001L macro
Ddce_8_0_sh_mask.h11045 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK 0x1 macro
Ddce_10_0_sh_mask.h11429 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK 0x1 macro
Ddce_11_0_sh_mask.h11241 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK 0x1 macro
Ddce_11_2_sh_mask.h12495 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK 0x1 macro
Ddce_12_0_sh_mask.h2285 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h322 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_1_0_sh_mask.h1731 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_2_1_0_sh_mask.h232 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_3_0_1_sh_mask.h629 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_3_1_2_sh_mask.h7285 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_3_1_5_sh_mask.h5225 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_3_0_2_sh_mask.h335 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_3_1_6_sh_mask.h7942 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_2_0_0_sh_mask.h335 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro
Ddcn_3_0_0_sh_mask.h315 #define D3VGA_CONTROL__D3VGA_MODE_ENABLE_MASK … macro