Searched refs:Clk (Results 1 – 13 of 13) sorted by relevance
/linux-5.19.10/drivers/video/fbdev/via/ |
D | vt1636.c | 140 static int get_clk_range_index(u32 Clk) in get_clk_range_index() argument 142 if (Clk < DPA_CLK_30M) in get_clk_range_index() 144 else if (Clk < DPA_CLK_50M) in get_clk_range_index() 146 else if (Clk < DPA_CLK_70M) in get_clk_range_index() 148 else if (Clk < DPA_CLK_100M) in get_clk_range_index() 150 else if (Clk < DPA_CLK_150M) in get_clk_range_index()
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/linux-5.19.10/drivers/clk/microchip/ |
D | Kconfig | 7 bool "Clk driver for PolarFire SoC"
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/linux-5.19.10/drivers/net/ethernet/apple/ |
D | bmac.h | 45 # define Clk 0x0002 macro
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D | bmac.c | 1073 #define Clk 0x0002 macro 1089 bmwrite(dev, SROMCSR, ChipSelect | Clk); in bmac_clock_out_bit() 1113 bmwrite(dev, SROMCSR, data | ChipSelect | Clk ); in bmac_clock_in_bit()
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/linux-5.19.10/arch/arm64/boot/dts/amlogic/ |
D | meson-gxbb-odroidc2.dts | 306 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", 308 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En", 315 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
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D | meson-gxbb-nanopi-k2.dts | 248 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", 250 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En", 258 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
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D | meson-gxl-s805x-libretech-ac.dts | 248 "eMMC Clk", "eMMC Reset", "eMMC CMD", 249 "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",
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D | meson-gxl-s905x-khadas-vim.dts | 184 "eMMC Clk", "eMMC Reset", "eMMC CMD",
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D | meson-gxl-s905x-libretech-cc.dts | 271 "eMMC Clk", "eMMC Reset", "eMMC CMD",
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/linux-5.19.10/Documentation/devicetree/bindings/pwm/ |
D | pwm-st.txt | 18 For Clk properties, please refer to [2].
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/linux-5.19.10/arch/arm/boot/dts/ |
D | am335x-boneblack-hdmi.dtsi | 122 enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
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D | am335x-osd3358-sm-red.dts | 129 enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
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/linux-5.19.10/Documentation/driver-api/ |
D | clk.rst | 2 The Common Clk Framework
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