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Searched refs:CVMX_CIU_EN2_PPX_IP4_W1S (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/arch/mips/include/asm/octeon/
Dcvmx-ciu-defs.h18 #define CVMX_CIU_EN2_PPX_IP4_W1S(c) CVMX_CIU_ADDR(0xAC00, c, 0x0F, 8) macro
/linux-5.19.10/arch/mips/cavium-octeon/
Docteon-irq.c498 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask); in octeon_irq_ciu_enable_sum2()
907 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask); in octeon_irq_ciu_set_affinity_sum2()