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Searched refs:CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h4068 #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 0x4 macro
Dgfx_8_1_sh_mask.h4590 #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 0x4 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13027 #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT … macro
Dgc_9_1_sh_mask.h14331 #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT … macro
Dgc_9_2_1_sh_mask.h14196 #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT … macro
Dgc_9_4_2_sh_mask.h4129 #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT … macro
Dgc_10_1_0_sh_mask.h20327 #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT … macro
Dgc_10_3_0_sh_mask.h18549 #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT … macro