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Searched refs:CP_HQD_HQ_CONTROL1__CONTROL_MASK (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h4095 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK 0xffffffff macro
Dgfx_8_1_sh_mask.h4617 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK 0xffffffff macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13067 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK … macro
Dgc_9_1_sh_mask.h14371 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK … macro
Dgc_9_2_1_sh_mask.h14236 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK … macro
Dgc_9_4_2_sh_mask.h4169 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK … macro
Dgc_11_0_0_sh_mask.h17608 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK … macro
Dgc_10_1_0_sh_mask.h20369 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK … macro
Dgc_10_3_0_sh_mask.h18591 #define CP_HQD_HQ_CONTROL1__CONTROL_MASK … macro