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Searched refs:CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h2505 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK 0x1000000 macro
Dgfx_8_1_sh_mask.h3027 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK 0x1000000 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11945 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK … macro
Dgc_9_1_sh_mask.h13375 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK … macro
Dgc_9_2_1_sh_mask.h13153 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK … macro
Dgc_9_4_2_sh_mask.h3351 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK … macro
Dgc_11_0_0_sh_mask.h33902 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK … macro
Dgc_10_1_0_sh_mask.h39457 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK … macro
Dgc_10_3_0_sh_mask.h34722 #define CP_CPC_IC_BASE_CNTL__CACHE_POLICY_MASK … macro