Home
last modified time | relevance | path

Searched refs:CP_CMD_INDEX__CMD_QUEUE_SEL_MASK (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2104 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK 0x00030000L macro
Dgfx_7_2_sh_mask.h3169 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK 0x30000 macro
Dgfx_8_0_sh_mask.h3783 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK 0x70000 macro
Dgfx_8_1_sh_mask.h4305 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK 0x70000 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h1276 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK … macro
Dgc_9_1_sh_mask.h1175 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK … macro
Dgc_9_2_1_sh_mask.h1142 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK … macro
Dgc_9_4_2_sh_mask.h1775 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK … macro
Dgc_11_0_0_sh_mask.h6619 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK … macro
Dgc_10_1_0_sh_mask.h6760 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK … macro
Dgc_10_3_0_sh_mask.h7026 #define CP_CMD_INDEX__CMD_QUEUE_SEL_MASK … macro