Searched refs:CLK_TOP_CCI400_SEL (Results 1 – 6 of 6) sorted by relevance
| /linux-5.19.10/Documentation/devicetree/bindings/media/ |
| D | mediatek,vcodec-decoder.yaml | 144 <&topckgen CLK_TOP_CCI400_SEL>,
159 <&topckgen CLK_TOP_CCI400_SEL>,
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| /linux-5.19.10/include/dt-bindings/clock/ |
| D | mt8173-clk.h | 118 #define CLK_TOP_CCI400_SEL 108 macro
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| D | mt2712-clk.h | 155 #define CLK_TOP_CCI400_SEL 124 macro
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| /linux-5.19.10/drivers/clk/mediatek/ |
| D | clk-mt8173.c | 579 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16, 3, 23),
834 clk_prepare_enable(mt8173_top_clk_data->hws[CLK_TOP_CCI400_SEL]->clk); in mtk_clk_enable_critical()
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| D | clk-mt2712.c | 795 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel",
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| /linux-5.19.10/arch/arm64/boot/dts/mediatek/ |
| D | mt8173.dtsi | 1403 <&topckgen CLK_TOP_CCI400_SEL>,
1418 <&topckgen CLK_TOP_CCI400_SEL>,
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