Searched refs:CLK_TOP_CAMTG_SEL (Results 1 – 12 of 12) sorted by relevance
/linux-5.19.10/include/dt-bindings/clock/ |
D | mt8135-clk.h | 90 #define CLK_TOP_CAMTG_SEL 79 macro
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D | mt6765-clk.h | 137 #define CLK_TOP_CAMTG_SEL 102 macro
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D | mt8173-clk.h | 100 #define CLK_TOP_CAMTG_SEL 90 macro
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D | mt2712-clk.h | 137 #define CLK_TOP_CAMTG_SEL 106 macro
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D | mt2701-clk.h | 91 #define CLK_TOP_CAMTG_SEL 80 macro
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D | mt8192-clk.h | 27 #define CLK_TOP_CAMTG_SEL 15 macro
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/linux-5.19.10/drivers/clk/mediatek/ |
D | clk-mt8135.c | 377 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents, 0x0158, 8, 3, 15),
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D | clk-mt2701.c | 504 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents,
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D | clk-mt2712.c | 755 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel",
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D | clk-mt6765.c | 387 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG_SEL, "camtg_sel",
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D | clk-mt8173.c | 553 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents, 0x0060, 0, 3, 7),
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D | clk-mt8192.c | 745 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG_SEL, "camtg_sel",
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