Searched refs:CLK_TOP_AUD_INTBUS_SEL (Results 1 – 20 of 20) sorted by relevance
| /linux-5.19.10/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 78 #define CLK_TOP_AUD_INTBUS_SEL 67 macro
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| D | mt7629-clk.h | 100 #define CLK_TOP_AUD_INTBUS_SEL 90 macro
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| D | mt8516-clk.h | 168 #define CLK_TOP_AUD_INTBUS_SEL 136 macro
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| D | mt7622-clk.h | 85 #define CLK_TOP_AUD_INTBUS_SEL 73 macro
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| D | mt6765-clk.h | 147 #define CLK_TOP_AUD_INTBUS_SEL 112 macro
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| D | mt8173-clk.h | 111 #define CLK_TOP_AUD_INTBUS_SEL 101 macro
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| D | mt2712-clk.h | 148 #define CLK_TOP_AUD_INTBUS_SEL 117 macro
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| D | mt8192-clk.h | 40 #define CLK_TOP_AUD_INTBUS_SEL 28 macro
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| /linux-5.19.10/Documentation/devicetree/bindings/sound/ |
| D | mt8195-afe-pcm.yaml | 169 <&topckgen 33>, //CLK_TOP_AUD_INTBUS_SEL
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| /linux-5.19.10/drivers/clk/mediatek/ |
| D | clk-mt8135.c | 360 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt7629.c | 526 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt7622.c | 558 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt8516.c | 378 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt8167.c | 550 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt2712.c | 779 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel",
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| D | clk-mt6765.c | 420 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel",
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| D | clk-mt8173.c | 566 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents, 0x0080, 24, 3, 31),
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| D | clk-mt8192.c | 775 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel",
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| /linux-5.19.10/arch/arm64/boot/dts/mediatek/ |
| D | mt8192.dtsi | 322 clocks = <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
771 <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
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| D | mt8173.dtsi | 864 <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
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